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Company
Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group > ASICS Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using state-of-the-art tools and technologies. You will be part of a team responsible for the complete Physical Design Flow and deliveries of complex, high-speed, low power designs such as GPU, Camera and other MM, DDR, Modem, Audio . Tasks also involve the development and enablement of low power implementation methods, customized P&R to achieve area reduction, performance, and power goals. Additional responsibilities in this role involves good understanding of functional and test (DFT) mode constraints for place and route, floorplanning, power planning, IR drop analysis, cell placement, multi-mode & multi-corner (MMMC) clock tree synthesis, routing, timing optimization and closure, RC extraction, signal integrity, cross talk noise and delay analysis, debugging timing violations for MMMC designs, implementing timing fixes and functional ECOs, debugging and fixing physical violations, and formal verification. The individual also should have deep knowledge on scripting and software languages including Python, PERL/TCL, Linux/Unix shell and C. This individual will design, verify, and deliver complex Physical Design solutions from netlist and timing constraints to the final product. Preferred Qualifications 10+ years industry experience in the following areas:Referrals increase your chances of interviewing at Qualcomm by 2x
Poway, CA $81,080.00-$141,650.00 3 days ago
Poway, CA $105,890.00-$189,545.00 3 days ago
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