Job Description

Marvell Physical Design Engineer

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

The Marvell Physical Design team located in our Westborough, MA office has a long history of successful design tapeouts in advanced process nodes. Our team is made up of both newer and more experienced engineers with a broad depth of physical design engineering experience. Being a part of our team will give you a chance to work on many different aspects of the chip design process, while working alongside some of the best engineers in the industry. In this unique role, you'll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor and data center chips in a leading-edge CMOS process technology.

What We're Looking For

Educational Background: Bachelor's degree in Computer Science, Electrical Engineering or related fields and 1-3 years of experience. Master's degree in Computer Science, Electrical Engineering or related fields with no professional experience.

Hands-On Exposure: Exposure to industry-standard EDA tools, which can include synthesis, floor planning, place and route, clock tree synthesis, timing closure, and physical verification.

Physical Design Methodologies: Proven experience working with RTL-to-GDS flows, including experience with digital logic and computer architecture using Verilog/VHDL. Familiarity with timing analysis and congestion resolution is a plus.

Scripting Skills: Experience in scripting languages such as Perl, tcl, and Python for automation and workflow enhancement.

Communication & Teamwork: Excellent communication skills and a proven ability to work effectively in a collaborative, team-oriented environment.

Problem-Solving: Ability to troubleshoot and resolve complex timing and physical design issues at block and partition levels.

What Can You Expect

Physical Design Execution: Perform synthesis, floor planning, place and route, clock tree synthesis, and timing analysis. You are a part of a team that ensures that designs meet performance, power, and area goals across advanced technology nodes like 7nm, 5nm and 3nm.

Methodology Development: Contribute to Place and Route methodology for efficient and robust design processes, enhancing Marvell's physical design flow. You will support maintenance and support for these methodologies to ensure continued improvements in efficiency and accuracy.

Timing and Logic ECOs: Contribute to the development and implementation of timing and logic Engineering Change Orders (ECOs) while collaborating with RTL teams to address congestion and timing issues.

Cross-functional Collaboration: Collaborate with the frontend design and global timing teams to resolve timing issues, ensuring a smooth tape-out process.

Innovative Challenges: Tackle complex, multi-disciplinary challenges and play a key role in driving technology advancements in cutting edge chip designs. Your role is a critical interface between backend design, frontend design, and methodology teams.

Expected Base Pay Range: $100,400 - $148,630 per annum. The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements: At Marvell, we offer a total compensation package with a base, bonus and equity. Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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